Oscillator circuits are used in applications that can range from test circuitry to speech synthesizers, and may be called upon to output a stable frequency over a range from perhaps 1 KHz to perhaps 1 MHz. Although it is desirable that the output frequency be stable and reasonably predictable before any frequency trimming is carried out, implementing such oscillators has proved to be a challenge. The output of such oscillators is often used to trigger other circuitry, and thus high noise immunity is also a requirement. To avoid having to tightly regulate the source of operating potential Vdd, the oscillator frequency should be substantially independent of variations in Vdd. Further, the oscillator frequency should be substantially independent of variations in the fabrication processes used to construct the oscillator.
FIGS. 1A and 1B depict conventional oscillator circuitry, according to the prior art. FIG. 1A is a simplification of a bipolar circuit found in the popular 555 astable oscillator integrated circuit ("IC"). Current flow (i) into a timing capacitor (C.sub.t) changes the voltage (v) appearing across the capacitor as a function of time (t) according to the equation: EQU i=C.sub.t dv/dt
The bipolar circuit of FIG. 1A requires several on-chip resistors (e.g., R1, R2, R3) in addition to off-chip resistors Rta, Rtb and the off-chip timing capacitor C.sub.t. The off-chip passive components Rta, Rtb, C.sub.t add to the size and cost of the overall oscillator unit.
Circuits such as shown in FIG. 1A rely upon a hopefully fixed voltage reference that is input to one or more comparators. The ramp voltage appearing across a timing capacitor in response to a hopefully constant current is then compared to this fixed reference voltage to determine an oscillation period.
The frequency (f) of the oscillator output signal (OSCOUT) provided from the circuit of FIG. 1A is given by the equation: EQU f=t/T=1.44/(Rta+2.times.Rtb).times.C.sub.t
where T is the period of the oscillator frequency.
Unless the current into the timing capacitor C.sub.t is maintained substantially constant, and unless the reference threshold voltage is substantially constant, the OSCOUT frequency will vary, assuming of course that C.sub.t is itself suitably stable. But maintaining a constant current and constant reference voltage requires maintaining good regulation on the power supply Vdd, as well as maintaining constant values for the resistors Rta, Rtb in the current path. Understandably it can be difficult to predict what the frequency f will be, without trimming one or more component values and/or adjusting voltage levels.
FIG. 1B depicts a so-called constant current relaxation oscillator unit, whose implementation requires complementary metal-oxide-silicon ("CMOS") devices as well as a bipolar bandgap generator to provide a reference input voltage Vref. Such a circuit is disclosed in U.S. Pat. No. 5,352,934 (1994) to Khan. The frequency of the OSCOUT output signal from this oscillator circuit is given by the following equation, where B is a constant and Iosc is constant current: EQU f=1/T=B.times.Iosc/(Vref.times.Cap)
The period of oscillator (T or T.sub.osc) is given by: EQU T.sub.osc =A.times.Cap.times.(Vref/Iosc)
where A is a constant, Vref is a fixed reference voltage toward which capacitors Cap charge, and (Vref/Iosc).apprxeq.R, an equivalent resistance.
Cycle time T.sub.osc of the oscillator clock circuit is proportional to the R.times.Cap product and scaling constant A. As such, we may write: EQU T.sub.osc =A.times.Cap.times.R
If Cap is stable in magnitude, the frequency or clock period will be stable providing that R is stable. The value of R will be stable providing that the quotient (Vref/Iosc) is stable.
In FIG. 1B, Vref is maintained substantially stable by using a bandgap reference generator to provide this reference voltage. However, bandgap generators require bipolar circuitry and can be very tricky to properly design. Also, the resultant overall oscillator circuit will combine bipolar devices (in the bandgap generator) and CMOS devices, and be BiCMOS, which requires a more complicated and expensive fabrication than a strictly CMOS circuit implementation. Some oscillator circuits are implemented using pure CMOS but with parasitic bipolar components, and thus require careful and accurate characterization of the parasitic bipolar devices in the normal CMOS devices. In such implementation, good circuit design requires that very special attention be paid to the bipolar portion (be it BiCMOS or parasitic bipolar) of the circuit to reduce parasitic contributions from the bipolar transistors.
But even with a stable value of Vref, the oscillator frequency for the circuit of FIG. 1B will still be very sensitive to variations in the Cap value and in Iosc variations. Variations in Iosc can result from variations in the process used to fabricate the overall circuit, as well as variations in the power supply Vdd.
To summarize, there is a need for a stable oscillator that may be economically implemented using CMOS techniques, without need for bipolar devices. Such oscillator should maintain an output frequency that is substantially constant and predictable with respect to variations in operating power supply. If frequency trimming options are provided, a reduced number of trimming components should be used. Further, the oscillator frequency should be readily adjustable to be a known constant, despite variations in component and device process and fabrication parameters. The oscillator should lend itself to precise frequency multiplication, including multiplication by non-integer multiples, and should provide a programmable frequency multiplication function.
The present invention discloses such an oscillator.